RISC-V logo

The event is now over… See you next year!



Time Speaker Title
09h Welcome
09h30 Sébastien Pillement Presentation of GDR SOC2
09h40 Marie-Hélène Deredempt Presentation of IRT Saint-Exupéry
09h50 Michael Chapman RISC-V in embedded applications
10h35 Break
10h50 Antoine Certain What does the space industry expect from RISC-V?
11h20 Johan Klockars Development of a RV64GC IP core for the GRLIB IP Library
12h05 Lunch
14h00 Denis Dutoit European Processor Initiative: First steps towards a made-in-Europe high-performance microprocessor
14h45 Eric Jenn Achieving determinism and performance on the RISC-V FlexPRET Processor
15h30 Break
15h45 Daniel Große RISC-V based Virtual Prototype: An Open Source Platform for Modeling and Verification
16h30 Romain Soulat Formal Verification of RISC-V Implementation Designs
17h15 Closure