The RISC-V Week is split between two venues, both located in Paris downtown:
The venue for the 2nd RISC-V Meeting on October 1st & 2nd, organised by IRT Nanoelec and CEA, will be Espace Van Gogh, 62 quai de la Rapée, Paris XIIe. It can easily be reached by public transport at the « Quai de la Rapée » station on line n°5, or at the « Gare de Lyon » station on RER A, RER D, metro n°1 & 14, bus n°24, 29, 57, 61, 63, 72, 77, 87 & 91.
The « Journée scientifique IRT SE & GDR SOC2: RISC-V for critical embedded systems » day, on 3rd October, organised by IRT St-Exupéry and GDR SOC2, will take place at the Sorbonne Université, Campus Pierre et Marie Curie, 4 place Jussieu, Paris Ve. Tower 26, Corridor 25–26, Room 105.
Both are easily reached by public transportation.